Key corrections:
- Routing subnet is the ONLY external input path; all images/text/voice must pass through it
- LLM subnet is the ONLY external output path; natural language goes directly to user
- Core is a purely internal layer, not directly exposed to users
- Memory subnet is autonomous: Core only passes query tensors + new information tensors;
how to update/delete/modify is entirely decided by memory subnet
- Routing subnet uses sliding window mechanism: instant label tensor generation → Core,
then after the round ends, Core schedules routing to process remaining raw data
- Updated all ASCII diagrams, Mermaid diagrams, pseudo-code, and data flow charts
- Added border rules table to all relevant docs
- Added precise design pattern description (Adapter Pattern for codec, Facade Pattern for TensorBus interface)
- Dynamic grid-joining: register new subnets at runtime via TensorBus.register()
- Hot-plug: add/remove subnets without interrupting system
- Zero-Copy via kernel bypass on HarmonyOS 6.1
- Hardware affinity: NPU/GPU native tensor operations
- High data fidelity: lossless transfer of high-dim feature maps & attention weights
- Runtime training: support creating subnets on-demand while system runs
Key corrections:
- Subnets communicate via Standard Tensor Protocol, not natural language
- Core scheduling is heuristic (non-linear), not pipeline-based
- LLM subnet has dual output: natural language→user, expression tensor→Core
- Core aggregates subnet results → memory update parameter tensor → memory subnet
- Added TrulyMEM-style graph DB (Neo4j) reference in memory-subnet.md
- LLM is demoted to specialized language generation engine
- All docs include correct tensor schemas, architecture diagrams, and training plans
